FPGAs are a form of hardware accelerators which after careful design and verification allows for significant improvements in performance on a specialized task. One of the main caveats with using FPGAs however are the fact that it is extremely difficult to compile and design an FPGA from scratch. Spatial is a DSL which was created to offset some of the load from the FPGA design process by creating a high level abstraction which allows the engineer to rapidly explore the trades off with performance and resource utilization when evaluating different implementations.

Is it possible to map higher-level language code (like python) to FPGA's? It seems like writing spatial has a high learning curve (this comes from someone who comfortable in verilog) and although it is most likely easier to work with relative to verilog, its probably relatively niche (not a big community for support).