Exploit parallelism in the segments of the whole workload by separating it into separate threads, rather than trying to tease out ways of exploiting more ILP faster from a single stream.

I find this slide slightly misleading because it is titled "multi-core era" but only shows a single core. The point is, however, that the cores in modern multi-core processors are much simpler. Unlike the diagram on slide 15, we no longer have:

1. A big data cache
2. An out-of-order control logic unit
3. A fancy branch predictor
4. A memory pre-fetcher
5. Two fetch / decode units

All of the chip real estate has been dedicated instead to "vanilla" cores. I think this is one of those rare cases when quantity trumps quality.