Had a question that goes one level down from this level of abstraction. How exactly do the Fetch/Decode + ALU units work with the execution context registers? Since data isn't actually stored in the Fetch/Decode or ALUs, what exactly are they at the hardware level and what do they do?
Had a question that goes one level down from this level of abstraction. How exactly do the Fetch/Decode + ALU units work with the execution context registers? Since data isn't actually stored in the Fetch/Decode or ALUs, what exactly are they at the hardware level and what do they do?