As I understand it, in this image, there are two links with different bandwidths, and this difference in bandwidth is what causes link 1 to be "slow" and link 2 to be "fast". Therefore, the same piece of data can travel more quickly in link 2 since link 2 has a higher rate of transmission. However, there is no mention of latency between the two links here - are we assuming the latency between the two links is the same? Otherwise, if link 1 had a much smaller latency than link 2, is it possible that the data would travel faster on link 1?

This is very similar to the diagram for sending a message over the internet to another computer [cs144]. Data travels from an endhost, goes through various routers or switches, and then arrives at another endhost. In that diagram, link speeds between routers (and endhost to routers) could vary, much like how the different links in this diagram can vary. One issue that arose in the network diagram was that routers maintained queues, and in periods of high congestion, it was possible for the queue on a router to be full, causing packets to be dropped/lost. This usually happens when link1 speed is >> link2 speed, meaning packets build up in the router since it can't send them out fast enough.

Is a similar issue possible when it comes to processor to processor communication? I'm unsure what the node between the two link speeds represents, but is it possible for it to be overflowed with data, causing a need for messages to be re-sent? That is, does processor to processor communication use a 3-way handshake (similar to TCP) to verify that data is fully sent? Or do processors ensure that data can be fully delivered by maintaing some set of invariants?

@lfu I think your question about data transfers (and to that end "idempotent" transactions [cs144]) is a really interesting way of bridging the two classes. In my mind I think that the need for data to be re-sent in our cases (between two processors) is much less likely than in the case for real network traffic (between two servers over the internet). In cs144 we are told that due to other issues like router congestion and packet loss, there is a need to resend data. I think that this may be less of a problem if all the data is present on the same hardware. However something that interests me is that are there processor equivalents off checksums? That is, if we are transferring data between two processors, do they do any sort of internal check to validate the originality of the data? I would think not (since that's not the job of a processor) but could happen.

@sagoyal I believe a transport protocol is still needed for passing data between hosts. Nowadays, we can lower involvement of the processor when doing remote memory accesses using something called Remote Direct Memory Access (RDMA). There are different protocols that define how to perform reliable remote memory accesses between processors, some use UDP/IP + its own reliability implementation (RoCE) while others use TCP/IP (iWARP). https://en.wikipedia.org/wiki/Remote_direct_memory_access