Are the controllers logical concepts that could be dynamically mapped to hardware components, or just each controller has its corresponding hardware component?

@jt From this paper (http://csl.stanford.edu/~christos/publications/2018.spatial.pldi.pdf), it seems that controllers are translated to DFGs when compiled, thereby influencing scheduling. It seems to me more like the way ISPC gangs execute instructions the compiler generates to simulate the results of working in unique hardware components.