Is this under the assumption that we have more processors, but with the same amount of memory total?

Just to close this off, @ishanguar yes I think the graphs assume that the size of the caches, at least for the L1 and L2 cache is within the same order of magnitude. However the key takeaway is that in the MP case there is access to shared data and the presence of a coherency protocol that results in invalidations in the caches that hence decrease hit rates.