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tyler.johnson

Would this directory be another location in hardware responsible for managing cache states, similar to the role of the bus? This doesn't seem all that different from something like the bus managing states and serializing requests. Is the main difference that the status of a line under that model is still stored at the line itself?

kasia4

A note: as you start increasing the number of processors in your system, it becomes inefficient/unfeasible to keep using a snooping based protocol. I believe for larger systems, a directory-based protocol is necessary.

teapot

I think the directory-based mechanism reduces contention on the bus as you are now sending 1-to-1 messages instead of broadcasting everything on the bus for all caches. Probably think of a scheme where you have 128 caches connected and all of them are trying to put messages on the bus..

haiyuem

@teapot I think the case you described would still cause contention on the directory if all processors are trying to access the directories. I think the idea of the directory is to reduce broadcast costs, e.g. when you have 128 processors you'd have to broadcast to 128 places, which might lead to inefficiencies in hardware implementation.

x2020

So can I understand that the directory is a data structure that stores:

1) address in shared memory => states in MSI

2) the current owners (processors) of each address in shared memory

So whenever we have an operation on an address, we can avoid broadcast and send information only to the corresponding owners.

jle

I'm curious—what's the implementation of broadcasting like? How does a processor read a broadcast/send one out? Likewise, where does the implementation of the directory happen?

haiyuem

@jle Should be a bunch of fan-outs to different flops within each processor. Once the data on the bus changes, message gets sent to all processors listening. Not sure about directory though.

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