Invalid here means that not in the cache and nothing to flush.

I - Stale/bad copy, not to be used S - No one is updating it and this copy is up to date M - Latest copy because I updated it. It's invalid everywhere else.

Thanks @suninhouse, that's exactly what I was wondering. What do you mean by "nothing to flush"? Do you mean that there's nothing to write back to memory? Or something else?

@pmp Invalid means that the cache line is invalidated because the data in the cache line is no longer current. Some other processor has made a write request to modify the copy of that data in their cache line (and has that cache line in the 'exclusive' state).

The cache line that is in a Modified state has the responsibility of flushing the cache line, which will cause the modified data to be written back to memory. A cache line in the invalid state does not have to do that, because its data is not current, and the real current data is in some other processor's cache.

To summarize / reiterate: Invalid means that the cache line no longer has the most recent data in it, which means that it is no longer valid to use.

wikipedia helped me a lot with MSI part. https://en.wikipedia.org/wiki/MSI_protocol I think if we can understand clearly what the definition of each state is, then the rest of the functions make more sense

Modified: The block has been modified in the cache. The data in the cache is then inconsistent with the backing store (e.g. memory). A cache with a block in the "M" state has the responsibility to write the block to the backing store when it is evicted. Shared: This block is unmodified and exists in read-only state in at least one cache. The cache can evict the data without writing it to the backing store. Invalid: This block is either not present in the current cache or has been invalidated by a bus request, and must be fetched from memory or another cache if the block is to be stored in this cache.[1]

If a cache line is invalid, when does the flush occur in the process?

If a cache line is invalid it means the line is not cached so it should have been flushed before entering the invalid state if it was written to. If it was in shared for reading and then entered the invalid state there is no need to flush.

The main idea for the MSI model is that any memory saved in caches must be kept coherent in the case of one processor's cache containing a different copy of data relative to another processor's cache. Thus, only one cache can ever have read permission over a given memory address at any time. Multiple cache's can read the same data from a given memory address and store it in cache, but the moment one of the caches writes, all other caches are informed of having invalid data.