A concrete example of when providing the intuitive memory behavior is not so simple is when you have a peripheral (say a GPIO input) which writes a reading into main memory.
So imagine you do a gpio read (by reading some address at memory, which was previously written to by the peripheral), and you get back a value of 0 for the pin. Also, this read gets cached. Then, an external source connected to the pin sets that pin to 1. However, we still have the value 0 in our cache, so if we try to read again, we will get a 0, even though the pin was set to 1. Thus, even on a uniprocessor, we have a need for coherence.
The peripheral can almost be thought of as another cpu/thread that has access to shared memory.
A concrete example of when providing the intuitive memory behavior is not so simple is when you have a peripheral (say a GPIO input) which writes a reading into main memory.
So imagine you do a gpio read (by reading some address at memory, which was previously written to by the peripheral), and you get back a value of 0 for the pin. Also, this read gets cached. Then, an external source connected to the pin sets that pin to 1. However, we still have the value 0 in our cache, so if we try to read again, we will get a 0, even though the pin was set to 1. Thus, even on a uniprocessor, we have a need for coherence.
The peripheral can almost be thought of as another cpu/thread that has access to shared memory.